The technology described herein relates to data processing systems, and in particular to the provision of downscaling in data processing systems.
Data processing systems can include a requirement for downscaling input data arrays, e.g. images, to a lower resolution at a particular rate and/or in a particular time period, e.g. in “real time”. An example of this is in the case of a data processing system that outputs images for display. In such a system, the, e.g., display controller for the display of the system may need to be able to downscale an input surface (image) that is to be displayed having a first, higher resolution to a lower resolution for display at an appropriate rate for “real time” output (e.g. at a given display update rate, such as 30 or 60 frames per second).
When performing downscaling, more input data must be fetched and processed as compared to the amount of output data that is being generated on the basis of the input data. FIG. 1 illustrates this, and shows that in the case of 2× downscaling in each direction (horizontal and vertical), four times as many input pixels must be fetched and processed as there are output pixels that are to be provided. (In the example shown in FIG. 1, the scaler 11 needs to receive 120 pixels of the input data array 12 in order to compute 30 output pixels of the output data array 13.)
It is known therefore to operate the downscaling process (or at least the input stage of the scaling process) at a higher frequency (at a higher clock frequency) than the frequency at which the downscaled output surface to be provided (e.g. for display). This will then allow more input data to be fetched and scaled in the time required for providing the output data. Accordingly, the downscaling operation may operate in a different clock domain to the output data processing.
However, while operating the downscaling process at a higher frequency than the downscaled output is to be provided for use can facilitate the performance of downscaling in “real time” in data processing systems, the Applicants have recognised that there can still be some downscaling use cases where the scaler clock frequency that would be required is so high that that may not be practically achievable, e.g. in a given data processing system implementation.
The Applicants believe therefore that there remains scope for improvements to the operation of data processing systems, in particular when performing downscaling operations in real time.
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